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DTSTAMP:20210916T132528Z
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DTSTART;TZID=Europe/Stockholm:20210709T140000
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UID:submissions.pasc-conference.org_PASC21_sess115@linklings.com
SUMMARY:Abstraction, Orchestration and Modelling of Data Movement in Heter
 ogeneous Memory Systems
DESCRIPTION:Minisymposium\n\nData movement is a constraining factor in alm
 ost all HPC applications and workflows. The reasons for this ubiquity incl
 ude physical design constraints, power limitations, relative advancements 
 of processors versus memory and rapid increases in dataset sizes. While de
 cades of research and innovation in HPC have resulted in robust and powerf
 ul optimizing environments, even basic data-movement optimization remains 
 a challenge. In many cases, fundamental abstractions suited to the express
 ion of data are still missing, as is a model of various memory types/featu
 res. Performance portability of Exascale systems requires that heterogeneo
 us memories are used intelligently and abstractly in the middleware/runtim
 e rather than requiring explicit, laborious hand-coding. To do so, capacit
 y, bandwidth and latency considerations of multiple levels must be underst
 ood (and often modeled) at runtime. Furthermore, the semantics of data usa
 ge within applications must be evident in the programming model. Several r
 esearch projects are presenting solutions for either a piece of this probl
 em (EPiGRAM-HS with MAMBA, Tuyere) or holistically (DaCE). This minisympos
 ium will present a sample of the most relevant research concerning program
 ming abstractions, models and runtimes for data movement from the perspect
 ives of vendors (HPE/Cray), world-class supercomputer centers (EPCC, ORNL)
  and programming model developers (ETH).\n\nAbstracting Heterogeneous Memo
 ry Systems for High Performance Applications\n\nDykes, Marsden\n\nHeteroge
 neous memory systems are present in almost all modern high-performance com
 puting systems, from traditional cache hierarchies and NUMA domains in mai
 n memory, to high bandwidth memories in accelerator and coprocessor device
 s, off-node flash storage, and more recently on-node NVDIMMs. In this ...\
 n\n---------------------\nStateful Dataflow Multigraphs: A Data-Centric Mo
 del for Performance Portability on Heterogeneous Architectures\n\nBen-Nun\
 n\nThe ubiquity of accelerators in high-performance computing has driven p
 rogramming complexity beyond the skill-set of the average domain scientist
 . To maintain performance portability in the future, it is imperative to d
 ecouple architecture-specific programming paradigms from the underlying sc
 ientifi...\n\n---------------------\nApplication Performance on Heterogene
 ous Memory Systems\n\nWeiland, Jackson\n\nThis presentation will look at t
 he performance of applications on heterogeneous memory systems - in partic
 ular DRAM and byte-addressable NVRAM. We will show example of both the opp
 ortunities and benefits, in particular for memory and I/O hungry applicati
 ons, as well as the challenges that such an en...\n\n---------------------
 \nSpeaker Panel Session on Abstraction, Orchestration and Modelling of Dat
 a Movement in Heterogeneous Memory Systems\n\nVetter\n\nModerated panel se
 ssion with the speakers from this session.\n\n\nDomain: CS and Math, Clima
 te and Weather, Engineering
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