Session

Description Data movement is a constraining factor in almost all HPC applications and workflows. The reasons for this ubiquity include physical design constraints, power limitations, relative advancements of processors versus memory and rapid increases in dataset sizes. While decades of research and innovation in HPC have resulted in robust and powerful optimizing environments, even basic data-movement optimization remains a challenge. In many cases, fundamental abstractions suited to the expression of data are still missing, as is a model of various memory types/features. Performance portability of Exascale systems requires that heterogeneous memories are used intelligently and abstractly in the middleware/runtime rather than requiring explicit, laborious hand-coding. To do so, capacity, bandwidth and latency considerations of multiple levels must be understood (and often modeled) at runtime. Furthermore, the semantics of data usage within applications must be evident in the programming model. Several research projects are presenting solutions for either a piece of this problem (EPiGRAM-HS with MAMBA, Tuyere) or holistically (DaCE). This minisymposium will present a sample of the most relevant research concerning programming abstractions, models and runtimes for data movement from the perspectives of vendors (HPE/Cray), world-class supercomputer centers (EPCC, ORNL) and programming model developers (ETH).