Session

DescriptionRecently, hardware manufacturers are responding to an increasing request for low precision functionality such as FP16 by integrating special low-precision functional units, e.g., NVIDIA Tensor cores. These, however, remain unused even for compute-intensive applications if high precision is employed for all arithmetic operations. At the same time, communication-intensive applications suffer from the memory bandwidth of architectures growing at a much slower pace than the arithmetic performance. In both cases, a promising strategy is to abandon the high-precision standard (typically fp64), and employ lower or non-standard precision for arithmetic computations or memory operations whenever possible. While employing formats other than working precision can render attractive performance improvements, it also requires careful consideration of the numerical effects. On the other end of the spectrum, precision formats with higher accuracy than the hardware-supported fp64 can be effective in improving the robustness and accuracy of numerical methods. With this breakout minisymposium, we aim to create a platform where those working with multiprecision or interested in using multiprecision technology come together and share their expertise and experience.